source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/xvd/7552/bxvd_dip.c

Last change on this file was 2, checked in by phkim, 11 years ago

1.phkim

  1. revision copy newcon3sk r27
  • Property svn:executable set to *
File size: 23.1 KB
Line 
1/***************************************************************************
2 *     Copyright (c) 2003-2012, Broadcom Corporation
3 *     All Rights Reserved
4 *     Confidential Property of Broadcom Corporation
5 *
6 *  THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7 *  AGREEMENT  BETWEEN THE USER AND BROADCOM.  YOU HAVE NO RIGHT TO USE OR
8 *  EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9 *
10 * $brcm_Workfile: bxvd_dip.c $
11 * $brcm_Revision: Hydra_Software_Devel/13 $
12 * $brcm_Date: 1/11/12 4:59p $
13 *
14 * [File Description:]
15 *
16 * Revision History:
17 *
18 * $brcm_Log: /magnum/portinginterface/xvd/7401/bxvd_dip.c $
19 *
20 * Hydra_Software_Devel/13   1/11/12 4:59p davidp
21 * SW7425-2132: Restore VDC RUL done interrupt mask register when
22 * processing watchdog.
23 *
24 * Hydra_Software_Devel/12   9/8/11 1:30p btosi
25 * SW7425-1064: added debug messages to help debug dual decode 3D
26 *
27 * Hydra_Software_Devel/11   7/20/11 3:07p davidp
28 * SW7420-2001: Reorder header-file includes.
29 *
30 * Hydra_Software_Devel/10   6/30/11 4:25p davidp
31 * SW7425-826: Clear vsync interrupt but when registering vdc mask with
32 * decoder.
33 *
34 * Hydra_Software_Devel/9   6/27/11 4:18p davidp
35 * SW7425-542: Merge devel branch to mainline.
36 *
37 * Hydra_Software_Devel/SW7425-542/2   6/8/11 7:07p davidp
38 * SW7425-542: Add Display Info macros.
39 *
40 * Hydra_Software_Devel/SW7425-542/1   6/7/11 5:51p davidp
41 * SW7425-542: Add support for AVD FW Host Interface Memory API.
42 *
43 * Hydra_Software_Devel/8   6/18/10 5:05p davidp
44 * SW7405-2993: Fix compiler warning on non DEBUG build.
45 *
46 * Hydra_Software_Devel/7   4/27/10 11:49a pblanco
47 * SW7405-2993: Conditionalize inclusion of stdio.h
48 *
49 * Hydra_Software_Devel/6   4/20/10 10:36a pblanco
50 * SW7405-2993: Fix build error for 7403.
51 *
52 * Hydra_Software_Devel/5   4/19/10 12:08p pblanco
53 * SW7405-2993: FIx build error for 7401.
54 *
55 * Hydra_Software_Devel/4   4/16/10 10:43a pblanco
56 * SW7405-2993: Add latency measuring code. Conditionalized compile for
57 * now, run time control later.
58 *
59 * Hydra_Software_Devel/3   3/16/10 3:35p davidp
60 * SW7405-4010: Save local copy of vsync_parity, stc_snapshot and
61 * stc1_snapshot to prevent inconsistent data from being used.
62 *
63 * Hydra_Software_Devel/2   3/8/10 4:40p davidp
64 * SW7405-2993: Fix non-debug build issue.
65 *
66 * Hydra_Software_Devel/1   2/25/10 4:24p nilesh
67 * SW7405-2993: XDM Merge
68 *
69 ***************************************************************************/
70#include "bstd.h"
71#include "bkni.h"          /* For malloc */
72#include "bmem.h"
73#include "bxvd.h"
74#include "bxvd_platform.h"
75#include "bxvd_priv.h"
76#include "bxvd_dip.h"
77
78#if (BCHP_CHIP == 7401 || BCHP_CHIP == 7403)
79#include "bchp_decode_ip_shim.h"
80#else
81#include "bchp_decode_ip_shim_0.h"
82#endif
83
84BDBG_MODULE(BXVD_DIP);
85BDBG_FILE_MODULE(BXVD_DIPCTL);
86BDBG_FILE_MODULE(BXVD_DIPDBG);
87
88#define BXVD_DIP_P_MEASURE_LATENCY 0
89#define LATENCY_FILE_OUTPUT 1
90
91#if BXVD_DIP_P_MEASURE_LATENCY
92#include <stdio.h>
93#endif
94
95typedef struct BXVD_DisplayInterruptProvider_P_DisplayInterruptHandler
96{
97      BXDM_DisplayInterruptHandler_isr fCallback;
98      void *pPrivateContext;
99} BXVD_DisplayInterruptProvider_P_DisplayInterruptHandler;
100
101typedef struct BXVD_DisplayInterruptProvider_P_ChannelContext
102{
103      BXVD_DisplayInterruptProvider_P_ChannelSettings stChannelSettings;
104
105      BXVD_DisplayInterruptProvider_P_InterruptSettings stInterruptSettings;
106      uint32_t uiRegMaskCurrent;
107      bool bInterruptSettingsValid;
108
109      /* BINT Callback Handle */
110      BINT_CallbackHandle hPictureDataReadyInterruptCallback;
111      BXDM_DisplayInterruptInfo stDisplayInterruptInfo;
112
113      /* Application Callback */
114      BXVD_DisplayInterruptProvider_P_DisplayInterruptHandler stDisplayInterruptHandler;
115} BXVD_DisplayInterruptProvider_P_ChannelContext;
116
117#if BXVD_DIP_P_MEASURE_LATENCY
118
119#define BXVD_DIP_MAX_TIME_SAMPLES 2048
120
121/* DM's persistent state between BXVD_StartDecode and
122 * BXVD_StopDecode */
123
124static uint32_t guiSampleIndex;
125static uint32_t gauiTimeSample[BXVD_DIP_MAX_TIME_SAMPLES];
126
127
128void BXVD_DIP_P_SampleTime(BXVD_DisplayInterruptProvider_P_ChannelHandle hXvdDipCh)
129{
130   uint32_t uiTemp;
131   BXVD_Handle hXvd = hXvdDipCh->stChannelSettings.hXvd;
132   BXVD_ChannelHandle hCh = hXvd->ahChannel[0];
133   BXVD_STC eStc;
134
135   if (guiSampleIndex >= BXVD_DIP_MAX_TIME_SAMPLES)
136   {
137      BKNI_Printf("\nBXVD_DIP_P_SampleTime too many samples\n");
138   }
139   else
140   {
141      if (hXvd->uDecoderInstance == 0)
142      {
143         BXVD_GetSTCSource(hCh, &eStc);
144         if (BXVD_STC_eZero == eStc  )
145         {
146            uiTemp = BREG_Read32(hXvd->hReg, BCHP_DECODE_IP_SHIM_0_STC0_REG);
147         }
148         else
149         {
150            uiTemp = BREG_Read32(hXvd->hReg, BCHP_DECODE_IP_SHIM_0_STC1_REG);
151         }
152      }
153      else
154      {
155         uiTemp = 0xFFFFFFFF;
156      }
157     
158      gauiTimeSample[guiSampleIndex] = uiTemp;
159      guiSampleIndex++;
160   }
161}
162
163static void BXVD_DIP_S_PrintSampleTimes(void *pXvdDipCh, uint32_t uiStcFromDecoder)
164{
165#if LATENCY_FILE_OUTPUT
166   FILE *outfd;
167#endif
168   int32_t iNum45kTicks;
169   int32_t iUsecs;
170
171   BSTD_UNUSED(pXvdDipCh);
172
173#if LATENCY_FILE_OUTPUT
174   outfd = fopen("timeresults.txt", "a+");
175   if (outfd == NULL)
176   {
177      BKNI_Printf("BXVD_DIP_S_PrintSampleTimes is unable to open output file\n");
178      return;
179   }
180#endif
181   /* Sampled STC, AVD STC snapshot and latency between the two. */
182   iNum45kTicks = (int)gauiTimeSample[0] - (int)uiStcFromDecoder;
183   iUsecs = ( iNum45kTicks * 1000 * 1000 ) / 45000;
184
185#if !LATENCY_FILE_OUTPUT
186   BKNI_Printf("%u,%u,%d,",
187         uiStcFromDecoder,
188         gauiTimeSample[0],
189         iUsecs
190         );
191#else
192   fprintf(outfd, "%u,%u,%d,", uiStcFromDecoder, gauiTimeSample[0], iUsecs);
193#endif
194
195   /* The elapse time for the DM ISR routine. */
196   iNum45kTicks = gauiTimeSample[2] - gauiTimeSample[0];
197   iUsecs = ( iNum45kTicks * 1000 * 1000 ) / 45000;
198#if !LATENCY_FILE_OUTPUT
199   BKNI_Printf("%u,", iUsecs );
200#else
201   fprintf(outfd, "%u,", iUsecs );
202#endif
203   /* Execution time for callbacks. */
204   iNum45kTicks = gauiTimeSample[2] - gauiTimeSample[1];
205   iUsecs = ( iNum45kTicks * 1000 * 1000 ) / 45000;
206#if !LATENCY_FILE_OUTPUT
207   BKNI_Printf("%u ", iUsecs );
208   BKNI_Printf("\n");
209#else
210   fprintf(outfd, "%u\n", iUsecs );
211   fflush(outfd);
212   fclose(outfd);
213#endif
214}
215#endif
216
217BERR_Code
218BXVD_DisplayInterruptProvider_P_GetDefaultChannelSettings(
219         BXVD_DisplayInterruptProvider_P_ChannelSettings *pstXvdDipChSettings
220         )
221{
222   BDBG_ENTER( BXVD_DisplayInterruptProvider_P_GetDefaultChannelSettings );
223
224   BDBG_ASSERT( pstXvdDipChSettings );
225
226   BKNI_Memset( pstXvdDipChSettings, 0, sizeof( BXVD_DisplayInterruptProvider_P_ChannelSettings ) );
227
228   BDBG_LEAVE( BXVD_DisplayInterruptProvider_P_GetDefaultChannelSettings );
229   return BERR_TRACE(BERR_SUCCESS);
230}
231
232void
233BXVD_DisplayInterruptProvider_S_PictureDataReady_isr(
234         void* pXvdDipCh,
235         int iParam2
236         )
237{
238   BXVD_DisplayInterruptProvider_P_ChannelHandle hXvdDipCh = (BXVD_DisplayInterruptProvider_P_ChannelHandle) pXvdDipCh;
239
240   BXVD_P_DisplayInfo stDisplayInfo;
241   BXVD_P_DisplayInfo stUpdateDisplayInfo;
242
243   uint32_t i;
244
245#if BDBG_DEBUG_BUILD
246   BXVD_DisplayInterrupt eDisplayInterrupt = ( BXVD_DisplayInterrupt ) iParam2;
247
248   BDBG_ASSERT( eDisplayInterrupt == hXvdDipCh->stChannelSettings.eDisplayInterrupt );
249#else
250   BSTD_UNUSED(iParam2);
251#endif
252
253   BDBG_ASSERT( hXvdDipCh );
254
255#if BXVD_DIP_P_MEASURE_LATENCY
256   guiSampleIndex = 0;
257   BKNI_Memset( gauiTimeSample, 0, (sizeof( uint32_t) * BXVD_DIP_MAX_TIME_SAMPLES) );
258
259   BXVD_DIP_P_SampleTime(hXvdDipCh);
260#endif
261
262   /*************************************/
263   /* Update the Display Interrupt Info */
264   /*************************************/
265
266   for ( i = 0; i < 2; i++ )
267   {
268      BXVD_P_READ_DISPLAY_INFO(hXvdDipCh, stDisplayInfo);
269
270      /* Extract Interrupt Polarity */
271      {
272         uint32_t uiTempBits = stDisplayInfo.vsync_parity &
273            ( hXvdDipCh->stInterruptSettings.stRULIDMasks.ui32BottomFieldRULIDMask |
274              hXvdDipCh->stInterruptSettings.stRULIDMasks.ui32TopFieldRULIDMask |
275              hXvdDipCh->stInterruptSettings.stRULIDMasks.ui32ProgressiveFieldRULIDMask );
276
277         /* Check if more than one vsync polarity bit is set */
278         if (uiTempBits & (uiTempBits - 1))
279         {
280            BDBG_WRN(("Multiple bits set in the vsync polarity bit field (0x%08x)", stDisplayInfo.vsync_parity));
281         }
282      }
283
284      if ( stDisplayInfo.vsync_parity & hXvdDipCh->stInterruptSettings.stRULIDMasks.ui32BottomFieldRULIDMask )
285      {
286         hXvdDipCh->stDisplayInterruptInfo.eInterruptPolarity = BAVC_Polarity_eBotField ;
287      }
288      else if ( stDisplayInfo.vsync_parity & hXvdDipCh->stInterruptSettings.stRULIDMasks.ui32TopFieldRULIDMask )
289      {
290         hXvdDipCh->stDisplayInterruptInfo.eInterruptPolarity = BAVC_Polarity_eTopField ;
291      }
292      else if ( stDisplayInfo.vsync_parity & hXvdDipCh->stInterruptSettings.stRULIDMasks.ui32ProgressiveFieldRULIDMask )
293      {
294         hXvdDipCh->stDisplayInterruptInfo.eInterruptPolarity = BAVC_Polarity_eFrame ;
295      }
296      else
297      {
298         /* We default to TopField for the vsync polarity if we don't
299          * recognize the polarity type */
300         BDBG_WRN(("Unrecognized VSYNC polarity type (0x%08x)", stDisplayInfo.vsync_parity));
301
302         hXvdDipCh->stDisplayInterruptInfo.eInterruptPolarity = BAVC_Polarity_eTopField ;
303      }
304
305      /* Verify that the AVD FW hasn't updated the STC and Vsync Parity, meaning something is keeping the
306         PDR ISR from being serviced in a timely manner */
307
308      BXVD_P_READ_DISPLAY_INFO(hXvdDipCh, stUpdateDisplayInfo);
309
310      if (!BXVD_P_IS_DISPLAY_INFO_EQUAL(stUpdateDisplayInfo, stDisplayInfo))
311      {
312         BDBG_ERR(("AVD Picture Data Ready interrupt not processed in time!")); 
313      }
314      else
315      {
316         break;
317      }
318   }
319
320   /* Extract STC snapshot(s) */
321   BDBG_ASSERT( BXVD_P_STC_MAX == hXvdDipCh->stDisplayInterruptInfo.uiSTCCount );
322
323   BXVD_P_SAVE_DIP_INFO_STC(hXvdDipCh, stDisplayInfo);
324
325   /* Increment Interrupt Count */
326   hXvdDipCh->stDisplayInterruptInfo.stInterruptCount.uiValue++;
327   hXvdDipCh->stDisplayInterruptInfo.stInterruptCount.bValid = true;
328
329   /* Execute the application's Picture Data Ready callback */
330   if( NULL != hXvdDipCh->stDisplayInterruptHandler.fCallback )
331   {
332#if BXVD_DIP_P_MEASURE_LATENCY
333      BXVD_DIP_P_SampleTime(hXvdDipCh);
334#endif
335     
336      {
337         /*
338          * If enabled, print out a debug message every vsync.
339          */
340         char cPolarity;
341         switch( hXvdDipCh->stDisplayInterruptInfo.eInterruptPolarity )
342         {
343            case BAVC_Polarity_eTopField:    cPolarity='T';    break;
344            case BAVC_Polarity_eBotField:    cPolarity='B';    break;
345            case BAVC_Polarity_eFrame:       cPolarity='F';    break;
346            default:                         cPolarity='u';    break;
347         }
348
349         BDBG_MODULE_MSG( BXVD_DIPDBG, ("%08x %d.%d %c stc:%08x(%d) %d",
350                  hXvdDipCh,
351                  hXvdDipCh->stChannelSettings.hXvd->uDecoderInstance,
352                  hXvdDipCh->stChannelSettings.eDisplayInterrupt,
353                  cPolarity,
354                  hXvdDipCh->stDisplayInterruptInfo.astSTC[0].uiValue,
355                  hXvdDipCh->stDisplayInterruptInfo.astSTC[0].bValid,
356                  hXvdDipCh->stDisplayInterruptInfo.stInterruptCount.uiValue
357                  ));
358      }
359
360      hXvdDipCh->stDisplayInterruptHandler.fCallback(
361               hXvdDipCh->stDisplayInterruptHandler.pPrivateContext,
362               &hXvdDipCh->stDisplayInterruptInfo
363               );
364#if BXVD_DIP_P_MEASURE_LATENCY
365      BXVD_DIP_P_SampleTime(hXvdDipCh);
366#endif
367   }
368
369#if BXVD_DIP_P_MEASURE_LATENCY
370#if !BXVD_P_FW_HIM_API
371
372   BXVD_DIP_S_PrintSampleTimes(hXvdDipCh, stDisplayInfo.stc_snapshot);
373#else
374   BXVD_DIP_S_PrintSampleTimes(hXvdDipCh, stDisplayInfo.stc_snapshot[0]);
375#endif
376
377#endif
378
379   return;
380}
381
382static BERR_Code
383BXVD_DisplayInterruptProvider_S_SetupInterrupts(
384         BXVD_DisplayInterruptProvider_P_ChannelHandle hXvdDipCh
385         )
386{
387   BERR_Code rc;
388
389   BDBG_ENTER( BXVD_DisplayInterruptProvider_S_SetupInterrupts );
390
391   BDBG_ASSERT( hXvdDipCh );
392
393   if ( hXvdDipCh->hPictureDataReadyInterruptCallback ) {
394      rc = BINT_DisableCallback( hXvdDipCh->hPictureDataReadyInterruptCallback );
395      if (rc != BERR_SUCCESS)
396      {
397         return BERR_TRACE(rc);
398      }
399   } else {
400      rc = BINT_CreateCallback(
401               &hXvdDipCh->hPictureDataReadyInterruptCallback,
402               hXvdDipCh->stChannelSettings.hInterrupt,
403               hXvdDipCh->stChannelSettings.interruptId,
404               BXVD_DisplayInterruptProvider_S_PictureDataReady_isr,
405               ( void* ) hXvdDipCh,
406               hXvdDipCh->stChannelSettings.eDisplayInterrupt
407               );
408
409      if (rc != BERR_SUCCESS)
410      {
411         return BERR_TRACE(rc);
412      }
413   }
414
415   rc = BINT_EnableCallback( hXvdDipCh->hPictureDataReadyInterruptCallback );
416   if (rc != BERR_SUCCESS )
417   {
418      return BERR_TRACE(rc);
419   }
420
421   BDBG_LEAVE( BXVD_DisplayInterruptProvider_S_SetupInterrupts );
422
423   return BERR_TRACE( BERR_SUCCESS );
424}
425
426static BERR_Code
427BXVD_DisplayInterruptProvider_S_TeardownInterrupts(
428         BXVD_DisplayInterruptProvider_P_ChannelHandle hXvdDipCh
429         )
430{
431   BERR_Code rc;
432
433   BDBG_ENTER( BXVD_DisplayInterruptProvider_S_TeardownInterrupts );
434
435   BDBG_ASSERT( hXvdDipCh );
436
437   if ( hXvdDipCh->hPictureDataReadyInterruptCallback ) {
438      rc = BINT_DisableCallback( hXvdDipCh->hPictureDataReadyInterruptCallback );
439      if (rc != BERR_SUCCESS)
440      {
441         return BERR_TRACE(rc);
442      }
443
444      rc = BINT_DestroyCallback( hXvdDipCh->hPictureDataReadyInterruptCallback );
445      if (rc != BERR_SUCCESS )
446      {
447         return BERR_TRACE(rc);
448      }
449
450      hXvdDipCh->hPictureDataReadyInterruptCallback = NULL;
451   }
452
453   BDBG_LEAVE( BXVD_DisplayInterruptProvider_S_TeardownInterrupts );
454
455   return BERR_TRACE( BERR_SUCCESS );
456}
457
458BERR_Code
459BXVD_DisplayInterruptProvider_P_OpenChannel(
460         BXVD_DisplayInterruptProvider_P_ChannelHandle *phXvdDipCh,
461         const BXVD_DisplayInterruptProvider_P_ChannelSettings *pstXvdDipChSettings
462         )
463{
464   BERR_Code rc;
465   BXVD_DisplayInterruptProvider_P_ChannelContext *pXvdDipCh = NULL;
466
467   BDBG_ENTER( BXVD_DisplayInterruptProvider_P_OpenChannel );
468
469   BDBG_ASSERT( phXvdDipCh );
470   BDBG_ASSERT( pstXvdDipChSettings );
471
472   /* Set the handle to NULL in case the allocation fails */
473   *phXvdDipCh = NULL;
474
475   pXvdDipCh = ( BXVD_DisplayInterruptProvider_P_ChannelContext* ) BKNI_Malloc( sizeof( BXVD_DisplayInterruptProvider_P_ChannelContext ) );
476   if ( NULL == pXvdDipCh )
477   {
478      return BERR_TRACE( BERR_OUT_OF_SYSTEM_MEMORY );
479   }
480
481   /* Zero out the newly allocated context */
482   BKNI_Memset( ( void * ) pXvdDipCh, 0, sizeof( BXVD_DisplayInterruptProvider_P_ChannelContext ) );
483
484   /* Allocate STC snapshot array */
485   pXvdDipCh->stDisplayInterruptInfo.uiSTCCount = BXVD_P_STC_MAX;
486   pXvdDipCh->stDisplayInterruptInfo.astSTC = ( BXDM_QualifiedValue * ) BKNI_Malloc( sizeof ( BXDM_QualifiedValue ) * pXvdDipCh->stDisplayInterruptInfo.uiSTCCount );
487   if ( NULL == pXvdDipCh->stDisplayInterruptInfo.astSTC )
488   {
489      BXVD_DisplayInterruptProvider_P_CloseChannel( pXvdDipCh );
490      return BERR_TRACE( BERR_OUT_OF_SYSTEM_MEMORY );
491   }
492
493   /* TODO: Validate the channel settings */
494   pXvdDipCh->stChannelSettings = *pstXvdDipChSettings;
495
496   /* Install Picture Data Ready Callback Handler */
497   rc = BXVD_DisplayInterruptProvider_S_SetupInterrupts( pXvdDipCh );
498   if ( BERR_SUCCESS != rc )
499   {
500      BXVD_DisplayInterruptProvider_P_CloseChannel( pXvdDipCh );
501      return BERR_TRACE(rc);
502   }
503
504   *phXvdDipCh = pXvdDipCh;
505
506   BDBG_MODULE_MSG( BXVD_DIPCTL, ("Create: hDip:%08x Decoder:%d hXvd:%08x eDisplayInterrupt:%d interruptId:%08x", 
507                  pXvdDipCh,
508                  pXvdDipCh->stChannelSettings.hXvd->uDecoderInstance,
509                  pXvdDipCh->stChannelSettings.hXvd,
510                  pXvdDipCh->stChannelSettings.eDisplayInterrupt,
511                  pXvdDipCh->stChannelSettings.interruptId
512                  ));
513
514   BDBG_LEAVE( BXVD_DisplayInterruptProvider_P_OpenChannel );
515
516   return BERR_TRACE( BERR_SUCCESS );
517}
518
519BERR_Code
520BXVD_DisplayInterruptProvider_P_CloseChannel(
521         BXVD_DisplayInterruptProvider_P_ChannelHandle hXvdDipCh
522         )
523{
524   BDBG_ENTER( BXVD_DisplayInterruptProvider_P_CloseChannel );
525
526   if ( NULL != hXvdDipCh )
527   {
528      BDBG_MODULE_MSG( BXVD_DIPCTL, ("Destroy: hDip:%08x Decoder:%d", 
529                           hXvdDipCh,
530                           hXvdDipCh->stChannelSettings.hXvd->uDecoderInstance ));
531
532      BXVD_DisplayInterruptProvider_S_TeardownInterrupts( hXvdDipCh );
533
534      BKNI_Free( hXvdDipCh->stDisplayInterruptInfo.astSTC );
535      BKNI_Free( hXvdDipCh );
536   }
537
538   BDBG_LEAVE( BXVD_DisplayInterruptProvider_P_CloseChannel );
539
540   return BERR_TRACE( BERR_SUCCESS );
541}
542
543BERR_Code
544BXVD_DisplayInterruptProvider_P_ProcessWatchdog(
545         BXVD_DisplayInterruptProvider_P_ChannelHandle hXvdDipCh
546         )
547{
548   BERR_Code rc;
549   BDBG_ENTER( BXVD_DisplayInterruptProvider_P_ProcessWatchdog );
550
551   BDBG_ASSERT( hXvdDipCh );
552
553   rc = BXVD_DisplayInterruptProvider_S_SetupInterrupts( hXvdDipCh );
554   if ( BERR_SUCCESS != rc )
555   {
556      return BERR_TRACE( rc );
557   }
558
559   if ( true == hXvdDipCh->bInterruptSettingsValid )
560   {
561      /* clear pending BVNF interrupts since they are edge-triggered */
562      BREG_Write32(hXvdDipCh->stChannelSettings.hRegister,
563                   hXvdDipCh->stChannelSettings.uiInterruptClearRegister,
564                   hXvdDipCh->uiRegMaskCurrent);
565
566      /* Restore mask register */
567      BREG_Write32(hXvdDipCh->stChannelSettings.hRegister,
568                   hXvdDipCh->stChannelSettings.uiInterruptMaskRegister,
569                   hXvdDipCh->uiRegMaskCurrent);
570
571      rc = BXVD_P_HostCmdSendConfig(hXvdDipCh->stChannelSettings.hXvd,
572                                    hXvdDipCh->stChannelSettings.eDisplayInterrupt,
573                                    hXvdDipCh->uiRegMaskCurrent);
574      if ( BERR_SUCCESS != rc )
575      {
576         return BERR_TRACE( rc );
577      }
578   }
579
580   BDBG_LEAVE( BXVD_DisplayInterruptProvider_P_ProcessWatchdog );
581
582   return BERR_TRACE( BERR_SUCCESS );
583}
584
585BERR_Code
586BXVD_DisplayInterruptProvider_P_GetDefaultInterruptSettings(
587         BXVD_DisplayInterruptProvider_P_InterruptSettings *pstXvdDipIntSettings
588         )
589{
590   BDBG_ENTER( BXVD_DisplayInterruptProvider_P_GetDefaultInterruptSettings );
591
592   BDBG_ASSERT( pstXvdDipIntSettings );
593
594   BKNI_Memset( pstXvdDipIntSettings, 0, sizeof( BXVD_DisplayInterruptProvider_P_InterruptSettings ) );
595
596   BDBG_LEAVE( BXVD_DisplayInterruptProvider_P_GetDefaultInterruptSettings );
597
598   return BERR_TRACE(BERR_SUCCESS);
599}
600
601BERR_Code
602BXVD_DisplayInterruptProvider_P_SetInterruptConfiguration(
603         BXVD_DisplayInterruptProvider_P_ChannelHandle hXvdDipCh,
604         const BXVD_DisplayInterruptProvider_P_InterruptSettings *pstXvdDipIntSettings
605         )
606{
607   BERR_Code rc;
608   uint32_t uiRegMaskCurrent;
609   uint32_t uiRegMaskNew;
610
611   BDBG_ENTER( BXVD_DisplayInterruptProvider_P_SetInterruptConfiguration );
612
613   BDBG_ASSERT( hXvdDipCh );
614   BDBG_ASSERT( pstXvdDipIntSettings );
615
616   uiRegMaskCurrent = ( hXvdDipCh->stInterruptSettings.stRULIDMasks.ui32ProgressiveFieldRULIDMask |
617                        hXvdDipCh->stInterruptSettings.stRULIDMasks.ui32TopFieldRULIDMask |
618                        hXvdDipCh->stInterruptSettings.stRULIDMasks.ui32BottomFieldRULIDMask );
619
620   uiRegMaskNew = ( pstXvdDipIntSettings->stRULIDMasks.ui32ProgressiveFieldRULIDMask |
621                    pstXvdDipIntSettings->stRULIDMasks.ui32TopFieldRULIDMask |
622                    pstXvdDipIntSettings->stRULIDMasks.ui32BottomFieldRULIDMask );
623
624   if ( ( false == hXvdDipCh->bInterruptSettingsValid )
625        || ( ( hXvdDipCh->uiRegMaskCurrent & uiRegMaskNew ) != uiRegMaskNew ) )
626   {
627      hXvdDipCh->bInterruptSettingsValid = true;
628      hXvdDipCh->stInterruptSettings = *pstXvdDipIntSettings;
629      hXvdDipCh->uiRegMaskCurrent = uiRegMaskNew;
630
631      /* clear pending BVNF interrupts since they are edge-triggered */
632      BREG_Write32(hXvdDipCh->stChannelSettings.hRegister,
633                   hXvdDipCh->stChannelSettings.uiInterruptClearRegister,
634                   hXvdDipCh->uiRegMaskCurrent);
635
636      BDBG_MODULE_MSG( BXVD_DIPCTL, ("hDip:%08x SetInterrupt Decoder:%d hXvd:%08x eDisplayInterrupt:%d mask:%08x", 
637                  hXvdDipCh,
638                  hXvdDipCh->stChannelSettings.hXvd->uDecoderInstance,
639                  hXvdDipCh->stChannelSettings.hXvd,
640                  hXvdDipCh->stChannelSettings.eDisplayInterrupt,
641                  hXvdDipCh->uiRegMaskCurrent
642                  ));
643
644      BREG_Write32(hXvdDipCh->stChannelSettings.hRegister,
645                   hXvdDipCh->stChannelSettings.uiInterruptMaskRegister,
646                   hXvdDipCh->uiRegMaskCurrent);
647
648      rc = BXVD_P_HostCmdSendConfig(hXvdDipCh->stChannelSettings.hXvd,
649                                    hXvdDipCh->stChannelSettings.eDisplayInterrupt,
650                                    hXvdDipCh->uiRegMaskCurrent);
651      if ( BERR_SUCCESS != rc )
652      {
653         return BERR_TRACE( rc );
654      }
655   }
656
657   BDBG_LEAVE( BXVD_DisplayInterruptProvider_P_SetInterruptConfiguration );
658
659   return BERR_TRACE( BERR_SUCCESS );
660}
661
662BERR_Code
663BXVD_DisplayInterruptProvider_P_GetInterruptConfiguration(
664         BXVD_DisplayInterruptProvider_P_ChannelHandle hXvdDipCh,
665         BXVD_DisplayInterruptProvider_P_InterruptSettings *pstXvdDipIntSettings
666         )
667{
668   BDBG_ENTER( BXVD_DisplayInterruptProvider_P_GetInterruptConfiguration );
669
670   BDBG_ASSERT( hXvdDipCh );
671   BDBG_ASSERT( pstXvdDipIntSettings );
672
673   *pstXvdDipIntSettings = hXvdDipCh->stInterruptSettings;
674
675   BDBG_LEAVE( BXVD_DisplayInterruptProvider_P_GetInterruptConfiguration );
676   return BERR_TRACE(BERR_SUCCESS);
677}
678
679BERR_Code
680BXVD_DisplayInterruptProvider_InstallCallback_DisplayInterrupt(
681         BXVD_DisplayInterruptProvider_P_ChannelHandle hXvdDipCh,
682         BXDM_DisplayInterruptHandler_isr fCallback,
683         void *pPrivateContext
684         )
685{
686   BDBG_ENTER( BXVD_DisplayInterruptProvider_InstallCallback_DisplayInterrupt );
687
688   BDBG_ASSERT( hXvdDipCh );
689
690   hXvdDipCh->stDisplayInterruptHandler.fCallback = fCallback;
691   hXvdDipCh->stDisplayInterruptHandler.pPrivateContext = pPrivateContext;
692
693   BDBG_MODULE_MSG( BXVD_DIPCTL, ("hDip:%08x Install DIH Decoder:%d hXvd:%08x eDisplayInterrupt:%d hDih:%08x cb:%08x", 
694                  hXvdDipCh,
695                  hXvdDipCh->stChannelSettings.hXvd->uDecoderInstance,
696                  hXvdDipCh->stChannelSettings.hXvd,
697                  hXvdDipCh->stChannelSettings.eDisplayInterrupt,
698                  hXvdDipCh->stDisplayInterruptHandler.pPrivateContext,
699                  hXvdDipCh->stDisplayInterruptHandler.fCallback
700                  ));
701
702   BDBG_LEAVE( BXVD_DisplayInterruptProvider_InstallCallback_DisplayInterrupt );
703
704   return BERR_TRACE( BERR_SUCCESS );
705}
706
707BERR_Code
708BXVD_DisplayInterruptProvider_GetDisplayInterruptInfo_isr(
709         BXVD_DisplayInterruptProvider_P_ChannelHandle hXvdDipCh,
710         BXDM_DisplayInterruptInfo *pstXvdDisplayInterruptInfo
711         )
712{
713   BDBG_ENTER( BXVD_DisplayInterruptProvider_GetDisplayInterruptInfo_isr );
714
715   BDBG_ASSERT( hXvdDipCh );
716   BDBG_ASSERT( pstXvdDisplayInterruptInfo );
717
718   *pstXvdDisplayInterruptInfo = hXvdDipCh->stDisplayInterruptInfo;
719
720   BDBG_LEAVE( BXVD_DisplayInterruptProvider_GetDisplayInterruptInfo_isr );
721
722   return BERR_TRACE( BERR_SUCCESS );
723}
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