source: svn/trunk/newcon3bcm2_21bu/nexus/modules/gpio/7552/include/nexus_gpio.h

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1/***************************************************************************
2*     (c)2004-2011 Broadcom Corporation
3*
4*  This program is the proprietary software of Broadcom Corporation and/or its licensors,
5*  and may only be used, duplicated, modified or distributed pursuant to the terms and
6*  conditions of a separate, written license agreement executed between you and Broadcom
7*  (an "Authorized License").  Except as set forth in an Authorized License, Broadcom grants
8*  no license (express or implied), right to use, or waiver of any kind with respect to the
9*  Software, and Broadcom expressly reserves all rights in and to the Software and all
10*  intellectual property rights therein.  IF YOU HAVE NO AUTHORIZED LICENSE, THEN YOU
11*  HAVE NO RIGHT TO USE THIS SOFTWARE IN ANY WAY, AND SHOULD IMMEDIATELY
12*  NOTIFY BROADCOM AND DISCONTINUE ALL USE OF THE SOFTWARE.
13*
14*  Except as expressly set forth in the Authorized License,
15*
16*  1.     This program, including its structure, sequence and organization, constitutes the valuable trade
17*  secrets of Broadcom, and you shall use all reasonable efforts to protect the confidentiality thereof,
18*  and to use this information only in connection with your use of Broadcom integrated circuit products.
19*
20*  2.     TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
21*  AND WITH ALL FAULTS AND BROADCOM MAKES NO PROMISES, REPRESENTATIONS OR
22*  WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
23*  THE SOFTWARE.  BROADCOM SPECIFICALLY DISCLAIMS ANY AND ALL IMPLIED WARRANTIES
24*  OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE,
25*  LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION
26*  OR CORRESPONDENCE TO DESCRIPTION. YOU ASSUME THE ENTIRE RISK ARISING OUT OF
27*  USE OR PERFORMANCE OF THE SOFTWARE.
28*
29*  3.     TO THE MAXIMUM EXTENT PERMITTED BY LAW, IN NO EVENT SHALL BROADCOM OR ITS
30*  LICENSORS BE LIABLE FOR (i) CONSEQUENTIAL, INCIDENTAL, SPECIAL, INDIRECT, OR
31*  EXEMPLARY DAMAGES WHATSOEVER ARISING OUT OF OR IN ANY WAY RELATING TO YOUR
32*  USE OF OR INABILITY TO USE THE SOFTWARE EVEN IF BROADCOM HAS BEEN ADVISED OF
33*  THE POSSIBILITY OF SUCH DAMAGES; OR (ii) ANY AMOUNT IN EXCESS OF THE AMOUNT
34*  ACTUALLY PAID FOR THE SOFTWARE ITSELF OR U.S. $1, WHICHEVER IS GREATER. THESE
35*  LIMITATIONS SHALL APPLY NOTWITHSTANDING ANY FAILURE OF ESSENTIAL PURPOSE OF
36*  ANY LIMITED REMEDY.
37*
38* $brcm_Workfile: nexus_gpio.h $
39* $brcm_Revision: 12 $
40* $brcm_Date: 7/14/11 2:11p $
41*
42* API Description:
43*   API name: Gpio
44*    Specific APIs related to Gpio Control.
45*
46* Revision History:
47*
48* $brcm_Log: /nexus/modules/gpio/7405/include/nexus_gpio.h $
49*
50* 12   7/14/11 2:11p jtna
51* SW7405-5414: added NEXUS_GpioSettings.maskEdgeInterrupts
52*
53* 11   5/2/11 4:03p erickson
54* SW7422-75: clarify use of nexus_platform_features.h for GPIO type
55*  values
56*
57* 10   12/6/10 10:53a erickson
58* SW7408-146: add NEXUS_Gpio_GetPinMux
59*
60* 9   10/11/10 3:46p erickson
61* SW7422-75: deprecate NEXUS_GpioType. convert from sparse array to
62*  linked list. nexus_gpio_table.c is now responsible for bounds check.
63*  this allows us to avoid updating generic code for chip-specific GPIO
64*  blocks.
65*
66* 8   4/19/10 4:29p erickson
67* SW7405-4228: use NEXUS_Gpio_Open macro and
68*  NEXUS_Gpio_OpenAux(typeAndPin) implementation to fix linux kernel mode
69*  proxy callbacks for GPIO
70*
71* 7   4/16/10 11:42a erickson
72* SW35230-124: update comments
73*
74* 6   4/5/10 3:06p jhaberf
75* SW35230-124: Added TV-Micro enumeration
76*
77* 5   3/18/09 11:54a jgarrett
78* PR 53230: Chaning default GPIO state to input for safety
79*
80* 4   2/26/08 10:49p erickson
81* PR35457: improved comments
82*
83* 3   1/23/08 8:36p vobadm
84* PR35457: update docs
85*
86* 2   1/23/08 5:16p erickson
87* PR35457: update docs
88*
89* 1   1/18/08 2:21p jgarrett
90* PR 38808: Merging to main branch
91*
92* Nexus_Devel/4   11/29/07 2:25p erickson
93* PR35457: doc update for 0.5 release
94*
95***************************************************************************/
96#ifndef NEXUS_GPIO_H__
97#define NEXUS_GPIO_H__
98
99#ifdef __cplusplus
100extern "C" {
101#endif
102
103/*=*********************
104GPIO stands for General Purpose Input/Output.
105GPIO pins are used for external communication to and from the chip.
106
107A GPIO pin can be configured for output or input mode.
108In output mode, a value can be set.
109In input mode, a value can be read and callback can be received (based on an interrupt) when the value changes.
110
111See nexus/examples/io/gpio.c for an example application.
112***********************/
113
114/***************************************************************************
115Summary:
116Handle for the GPIO Interface
117***************************************************************************/
118typedef struct NEXUS_Gpio *NEXUS_GpioHandle;
119
120/***************************************************************************
121Summary:
122GPIO pin type macros for first param of NEXUS_Gpio_Open(TYPE, PIN, pSettings)
123
124Description:
125Chip-specific GPIO types are coded as macros to nexus_platform_features.h.
126These types may be common across certain families of chips, but will vary among chips over time.
127GPIO type values must be matched against the GPIO types implemented in the chip-specific nexus_gpio_table.c file.
128
129The following macros are provided for backward-compatibility to the NEXUS_GpioType enumeration.
130***************************************************************************/
131#define NEXUS_GpioType unsigned
132#define NEXUS_GpioType_eStandard 0
133#define NEXUS_GpioType_eSpecial  1
134#define NEXUS_GpioType_eTvMicro  2
135#define NEXUS_GpioType_eMax      3
136
137/***************************************************************************
138Summary:
139GPIO pin modes
140
141Description:
142NEXUS_GpioMode is an enumeration which represents all GPIO pin modes
143supported by the GPIO interface.
144
145There are three GPIO pin types. They are input, push-pull output, or
146open-drain output. A standard GPIO could be programmed to be any one of
147the three types, and a special GPIO pin could only work in type of input
148and open-drain output.
149
150When programmed to be type of input, it can only be read from, and will
151not drive the bus or the port connected to it. The value read back could
1520 (low) or 1 (high).
153
154During working as type of push-pull output, it is ideally the unique
155driver of the connected bus or port, till the type changes. The value
156to drive out is either 0 (low) or 1 (high). It could change by setting
157the value of the GPIO pin. However, it could also be read from, in order
158to monitor the activity. Driving 0 out is also called pull-down, and
159driving 1 out is called push-up.
160
161A pin of open drain output type is typically connected to a wired-AND
162bus line. The line is high (1) if no one pulls it down, and if any
163device pulls down it becomes low (0). The application program could
164read it and pulling it down (and then releasing it).
165
166Please notice that the type could be dynamically changed by software. It
167is possible that the application program sets the GPIO pin as input type,
168reads a few bits, and then changes the pin type to push-pull output and
169then writes a few bits, and so on.
170
171Used in NEXUS_GpioSettings
172***************************************************************************/
173typedef enum NEXUS_GpioMode
174{
175    NEXUS_GpioMode_eInput,
176    NEXUS_GpioMode_eOutputOpenDrain,
177    NEXUS_GpioMode_eOutputPushPull,
178    NEXUS_GpioMode_eMax
179} NEXUS_GpioMode;
180
181/***************************************************************************
182Summary:
183The GPIO pin value
184
185Description:
186There are two possible values Low (0) and High (0) for a GPIO pin.
187NEXUS_GpioValue is an enumeration which represents them.
188
189A push-pull GPIO pin could drive both 0 (low) and 1 (high) out to the
190bus or connection port wired to this GPIO pin. A open-drain GPIO pin
191could pull-down the connected AND-wired bus line (0), till it releases
192it (1).
193
194The value of any GPIO pin could be read at any time. If a push-pull GPIO
195pin is read, its value would be the value it drives out. When a open-
196drain GPIO pin pulls-down, the value of 0 (low) will be returned by
197reading. After it releases the bus, the value read from the pin depends
198whether there is any other device on the bus that is pulling down the
199bus.
200
201Used in NEXUS_GpioSettings and NEXUS_GpioStatus
202***************************************************************************/
203typedef enum NEXUS_GpioValue
204{
205    NEXUS_GpioValue_eLow = 0,         /* low, driving low out means pull-down */
206    NEXUS_GpioValue_eHigh = 1,        /* high, driven for PushPull - released for OpenDrain */
207    NEXUS_GpioValue_eMax
208} NEXUS_GpioValue;
209
210/***************************************************************************
211Summary:
212GPIO pin interrupt mode
213
214Description:
215NEXUS_GpioInterrupt is an enumeration which represents whether an
216interrupt is disabled or enabled for a GPIO pin, and in what condition
217the GPIO pin should generate interrupt if it is enabled.
218
219Some chips only support edge triggering interrupt mode. In this mode the
220pin fires interrupt when its value changes.  By default, the interrupt will remain
221enabled after firing. See NEXUS_GpioSettings.maskEdgeInterrupts for another option.
222
223Besides edge triggering mode, some chips also support level
224triggering. This corresponds to NEXUS_GpioInterrupt_eLow and eHigh.
225In this mode the pin drives the interrupt bit when it has the
226specified value. To clear a level-triggered interrupt and reenable interrupts,
227the user must call NEXUS_Gpio_ClearInterrupt.
228
229Used in NEXUS_GpioSettings
230***************************************************************************/
231typedef enum NEXUS_GpioInterrupt
232{
233    NEXUS_GpioInterrupt_eDisabled,      /* No interrupt */
234    NEXUS_GpioInterrupt_eRisingEdge,    /* Interrupt on a 0->1 transition */
235    NEXUS_GpioInterrupt_eFallingEdge,   /* Interrupt on a 1->0 transition */
236    NEXUS_GpioInterrupt_eEdge,          /* Interrupt on both a 0->1 and a 1->0 transition */
237    NEXUS_GpioInterrupt_eLow,           /* Interrupt on a 0 value */
238    NEXUS_GpioInterrupt_eHigh,          /* Interrupt on a 1 value */
239    NEXUS_GpioInterrupt_eMax
240} NEXUS_GpioInterrupt;
241
242/***************************************************************************
243Summary:
244GPIO pin settings
245***************************************************************************/
246typedef struct NEXUS_GpioSettings
247{
248    NEXUS_GpioMode mode;               /* Set if this is an input or output pin, and what type of output pin. */
249    NEXUS_GpioValue value;             /* Used to set the value of an output pin. */
250    NEXUS_GpioInterrupt interruptMode; /* Set the interrupt mode of an input pin. */
251    NEXUS_CallbackDesc interrupt;      /* Callback when value is changed in input mode. */
252    bool maskEdgeInterrupts; /* If true, all GPIO interrupts will be masked when processed. The user must call NEXUS_Gpio_ClearInterrupt to unmask.
253                                If false, edge-triggered (default) are not masked. Level-triggered interrupts are always masked. */
254} NEXUS_GpioSettings;
255
256/***************************************************************************
257Summary:
258Get default settings for the structure.
259
260Description:
261This is required in order to make application code resilient to the addition of new structure members in the future.
262***************************************************************************/
263void NEXUS_Gpio_GetDefaultSettings(
264    NEXUS_GpioType type, /* unused */
265    NEXUS_GpioSettings *pSettings /* [out] */
266    );
267
268/***************************************************************************
269Summary:
270Open a GPIO Pin.
271
272Description:
273Users should call NEXUS_Gpio_Open, not NEXUS_Gpio_OpenAux.
274The internal NEXUS_Gpio_OpenAux implementation is required to marshall callbacks through a proxy layer.
275***************************************************************************/
276#define NEXUS_Gpio_Open(NEXUS_GPIOTYPE,PIN_NUMBER,PSETTINGS) NEXUS_Gpio_OpenAux((NEXUS_GPIOTYPE)<<16|(PIN_NUMBER),PSETTINGS)
277
278NEXUS_GpioHandle NEXUS_Gpio_OpenAux(
279    unsigned typeAndPin, /* The number and type of the pin. These values are muxed together by the
280                            NEXUS_Gpio_Open macro for kernel mode proxy support. */
281    const NEXUS_GpioSettings *pSettings /* additional settings for the pin */
282    );
283
284/***************************************************************************
285Summary:
286Close a GPIO Pin.
287***************************************************************************/
288void NEXUS_Gpio_Close(
289    NEXUS_GpioHandle handle
290    );
291
292/***************************************************************************
293Summary:
294Set the settings for a GPIO pin.
295***************************************************************************/
296NEXUS_Error NEXUS_Gpio_SetSettings(
297    NEXUS_GpioHandle handle,
298    const NEXUS_GpioSettings *pSettings
299    );
300
301/***************************************************************************
302Summary:
303Get the settings for a GPIO pin.
304
305Description:
306This is not the same as NEXUS_Gpio_GetStatus.
307This returns whatever was last set with NEXUS_Gpio_SetSettings,
308but the value may not be the actual value on a GPIO output pin.
309***************************************************************************/
310void NEXUS_Gpio_GetSettings(
311    NEXUS_GpioHandle handle,
312    NEXUS_GpioSettings *pSettings     /* [out] */
313    );
314
315/***************************************************************************
316Summary:
317Status of a GPIO pin.
318***************************************************************************/
319typedef struct NEXUS_GpioStatus
320{
321    NEXUS_GpioValue value; /* The data value of the pin.
322                              If the pin is in output mode, this will be the value set by NEXUS_GpioSettings.value.
323                              If the pin is in input mode, this will be the current value being driven to this pin. */
324    bool interruptPending; /* True if the interrupt callback has fired and NEXUS_Gpio_ClearInterrupt has not been cleared. */
325} NEXUS_GpioStatus;
326
327/***************************************************************************
328Summary:
329Get the status of a GPIO pin.
330***************************************************************************/
331NEXUS_Error NEXUS_Gpio_GetStatus(
332    NEXUS_GpioHandle handle,
333    NEXUS_GpioStatus *pStatus     /* [out] */
334    );
335
336/***************************************************************************
337Summary:
338Clear a pending interrupt on a GPIO pin.
339
340Description:
341This call must be made after the NEXUS_GpioSettings.interrupt callback to receive the next interrupt callback.
342***************************************************************************/
343NEXUS_Error NEXUS_Gpio_ClearInterrupt(
344    NEXUS_GpioHandle handle
345    );
346
347/***************************************************************************
348Summary:
349Get RDB pin mux information about GPIO pins
350
351Description:
352Example code:
353
354    NEXUS_Rdb_GetGpioPinMux(1, &addr, &mask, &shift);
355    value = NEXUS_Platform_ReadRegister(addr);
356    value &= ~mask; // set to zero to enable GPIO
357    NEXUS_Platform_WriteRegister(addr, value);
358
359Returns a failure if the typeAndPin is invalid.
360***************************************************************************/
361NEXUS_Error NEXUS_Gpio_GetPinMux(
362    unsigned typeAndPin, /* see NEXUS_Gpio_OpenAux for definition */
363    uint32_t *pAddr, /* [out] pinmux register address */
364    uint32_t *pMask, /* [out] bit mask for pinmux register (no shift required) */
365    unsigned *pShift /* [out] bit shift for pinmux register */
366    );
367   
368#ifdef __cplusplus
369}
370#endif
371
372#endif /* #ifndef NEXUS_GPIO_H__ */
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