| 1 | /* |
|---|
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
|---|
| 3 | * License. See the file "COPYING" in the main directory of this archive |
|---|
| 4 | * for more details. |
|---|
| 5 | * |
|---|
| 6 | * Copyright (C) 1996, 99 Ralf Baechle |
|---|
| 7 | * Copyright (C) 2000, 2002 Maciej W. Rozycki |
|---|
| 8 | * Copyright (C) 1990, 1999 by Silicon Graphics, Inc. |
|---|
| 9 | */ |
|---|
| 10 | #ifndef _ASM_ADDRSPACE_H |
|---|
| 11 | #define _ASM_ADDRSPACE_H |
|---|
| 12 | |
|---|
| 13 | /**********************************************************************/ |
|---|
| 14 | /* Include the common bits for #include <spaces.h> */ |
|---|
| 15 | #ifndef __mips64 |
|---|
| 16 | |
|---|
| 17 | #define CAC_BASE 0x80000000 |
|---|
| 18 | #define IO_BASE 0xa0000000 |
|---|
| 19 | #define UNCAC_BASE 0xa0000000 |
|---|
| 20 | #define MAP_BASE 0xc0000000 |
|---|
| 21 | |
|---|
| 22 | /* |
|---|
| 23 | * This handles the memory map. |
|---|
| 24 | * We handle pages at KSEG0 for kernels with 32 bit address space. |
|---|
| 25 | */ |
|---|
| 26 | #define PAGE_OFFSET 0x80000000UL |
|---|
| 27 | |
|---|
| 28 | #endif /* ifndef __mips64 */ |
|---|
| 29 | /**********************************************************************/ |
|---|
| 30 | |
|---|
| 31 | /* |
|---|
| 32 | * Configure language |
|---|
| 33 | */ |
|---|
| 34 | #ifdef __ASSEMBLY__ |
|---|
| 35 | #define _ATYPE_ |
|---|
| 36 | #define _ATYPE32_ |
|---|
| 37 | #define _ATYPE64_ |
|---|
| 38 | #else |
|---|
| 39 | #define _ATYPE_ __PTRDIFF_TYPE__ |
|---|
| 40 | #define _ATYPE32_ int |
|---|
| 41 | #define _ATYPE64_ long long |
|---|
| 42 | #endif |
|---|
| 43 | |
|---|
| 44 | /* |
|---|
| 45 | * 32-bit MIPS address spaces |
|---|
| 46 | */ |
|---|
| 47 | #ifdef __ASSEMBLY__ |
|---|
| 48 | #define _ACAST32_ |
|---|
| 49 | #define _ACAST64_ |
|---|
| 50 | #else |
|---|
| 51 | #define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */ |
|---|
| 52 | #define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */ |
|---|
| 53 | #endif |
|---|
| 54 | |
|---|
| 55 | /* |
|---|
| 56 | * Returns the kernel segment base of a given address |
|---|
| 57 | */ |
|---|
| 58 | #define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000) |
|---|
| 59 | |
|---|
| 60 | /* |
|---|
| 61 | * Returns the physical address of a CKSEGx / XKPHYS address |
|---|
| 62 | */ |
|---|
| 63 | #define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff) |
|---|
| 64 | #define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff) |
|---|
| 65 | |
|---|
| 66 | #ifdef __mips64 |
|---|
| 67 | |
|---|
| 68 | /* |
|---|
| 69 | * Memory segments (64bit kernel mode addresses) |
|---|
| 70 | * The compatibility segments use the full 64-bit sign extended value. Note |
|---|
| 71 | * the R8000 doesn't have them so don't reference these in generic MIPS code. |
|---|
| 72 | */ |
|---|
| 73 | #define XKUSEG 0x0000000000000000 |
|---|
| 74 | #define XKSSEG 0x4000000000000000 |
|---|
| 75 | #define XKPHYS 0x8000000000000000 |
|---|
| 76 | #define XKSEG 0xc000000000000000 |
|---|
| 77 | #define CKSEG0 0xffffffff80000000 |
|---|
| 78 | #define CKSEG1 0xffffffffa0000000 |
|---|
| 79 | #define CKSSEG 0xffffffffc0000000 |
|---|
| 80 | #define CKSEG3 0xffffffffe0000000 |
|---|
| 81 | |
|---|
| 82 | #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) |
|---|
| 83 | #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) |
|---|
| 84 | #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) |
|---|
| 85 | #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3) |
|---|
| 86 | |
|---|
| 87 | #else |
|---|
| 88 | |
|---|
| 89 | #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) |
|---|
| 90 | #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) |
|---|
| 91 | #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) |
|---|
| 92 | #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) |
|---|
| 93 | |
|---|
| 94 | /* |
|---|
| 95 | * Map an address to a certain kernel segment |
|---|
| 96 | */ |
|---|
| 97 | #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) |
|---|
| 98 | #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) |
|---|
| 99 | #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) |
|---|
| 100 | #define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) |
|---|
| 101 | |
|---|
| 102 | /* |
|---|
| 103 | * Memory segments (32bit kernel mode addresses) |
|---|
| 104 | * These are the traditional names used in the 32-bit universe. |
|---|
| 105 | */ |
|---|
| 106 | #define KUSEG 0x00000000 |
|---|
| 107 | #define KSEG0 0x80000000 |
|---|
| 108 | #define KSEG1 0xa0000000 |
|---|
| 109 | #define KSEG2 0xc0000000 |
|---|
| 110 | #define KSEG3 0xe0000000 |
|---|
| 111 | |
|---|
| 112 | #define CKUSEG 0x00000000 |
|---|
| 113 | #define CKSEG0 0x80000000 |
|---|
| 114 | #define CKSEG1 0xa0000000 |
|---|
| 115 | #define CKSEG2 0xc0000000 |
|---|
| 116 | #define CKSEG3 0xe0000000 |
|---|
| 117 | |
|---|
| 118 | #endif |
|---|
| 119 | |
|---|
| 120 | /* |
|---|
| 121 | * Cache modes for XKPHYS address conversion macros |
|---|
| 122 | */ |
|---|
| 123 | #define K_CALG_COH_EXCL1_NOL2 0 |
|---|
| 124 | #define K_CALG_COH_SHRL1_NOL2 1 |
|---|
| 125 | #define K_CALG_UNCACHED 2 |
|---|
| 126 | #define K_CALG_NONCOHERENT 3 |
|---|
| 127 | #define K_CALG_COH_EXCL 4 |
|---|
| 128 | #define K_CALG_COH_SHAREABLE 5 |
|---|
| 129 | #define K_CALG_NOTUSED 6 |
|---|
| 130 | #define K_CALG_UNCACHED_ACCEL 7 |
|---|
| 131 | |
|---|
| 132 | /* |
|---|
| 133 | * 64-bit address conversions |
|---|
| 134 | */ |
|---|
| 135 | #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p)) |
|---|
| 136 | #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p)) |
|---|
| 137 | #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) |
|---|
| 138 | #define PHYS_TO_XKPHYS(cm,a) (0x8000000000000000 | ((cm)<<59) | (a)) |
|---|
| 139 | |
|---|
| 140 | #if defined (CONFIG_CPU_R4300) \ |
|---|
| 141 | || defined (CONFIG_CPU_R4X00) \ |
|---|
| 142 | || defined (CONFIG_CPU_R5000) \ |
|---|
| 143 | || defined (CONFIG_CPU_NEVADA) \ |
|---|
| 144 | || defined (CONFIG_CPU_TX49XX) \ |
|---|
| 145 | || defined (CONFIG_CPU_MIPS64) |
|---|
| 146 | #define KUSIZE 0x0000010000000000 /* 2^^40 */ |
|---|
| 147 | #define KUSIZE_64 0x0000010000000000 /* 2^^40 */ |
|---|
| 148 | #define K0SIZE 0x0000001000000000 /* 2^^36 */ |
|---|
| 149 | #define K1SIZE 0x0000001000000000 /* 2^^36 */ |
|---|
| 150 | #define K2SIZE 0x000000ff80000000 |
|---|
| 151 | #define KSEGSIZE 0x000000ff80000000 /* max syssegsz */ |
|---|
| 152 | #define TO_PHYS_MASK 0x0000000fffffffff /* 2^^36 - 1 */ |
|---|
| 153 | #endif |
|---|
| 154 | |
|---|
| 155 | #if defined (CONFIG_CPU_R8000) |
|---|
| 156 | /* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */ |
|---|
| 157 | #define KUSIZE 0x0000010000000000 /* 2^^40 */ |
|---|
| 158 | #define KUSIZE_64 0x0000010000000000 /* 2^^40 */ |
|---|
| 159 | #define K0SIZE 0x0000010000000000 /* 2^^40 */ |
|---|
| 160 | #define K1SIZE 0x0000010000000000 /* 2^^40 */ |
|---|
| 161 | #define K2SIZE 0x0001000000000000 |
|---|
| 162 | #define KSEGSIZE 0x0000010000000000 /* max syssegsz */ |
|---|
| 163 | #define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */ |
|---|
| 164 | #endif |
|---|
| 165 | |
|---|
| 166 | #if defined (CONFIG_CPU_R10000) |
|---|
| 167 | #define KUSIZE 0x0000010000000000 /* 2^^40 */ |
|---|
| 168 | #define KUSIZE_64 0x0000010000000000 /* 2^^40 */ |
|---|
| 169 | #define K0SIZE 0x0000010000000000 /* 2^^40 */ |
|---|
| 170 | #define K1SIZE 0x0000010000000000 /* 2^^40 */ |
|---|
| 171 | #define K2SIZE 0x00000fff80000000 |
|---|
| 172 | #define KSEGSIZE 0x00000fff80000000 /* max syssegsz */ |
|---|
| 173 | #define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */ |
|---|
| 174 | #endif |
|---|
| 175 | |
|---|
| 176 | /* |
|---|
| 177 | * Further names for SGI source compatibility. These are stolen from |
|---|
| 178 | * IRIX's <sys/mips_addrspace.h>. |
|---|
| 179 | */ |
|---|
| 180 | #define KUBASE 0 |
|---|
| 181 | #define KUSIZE_32 0x0000000080000000 /* KUSIZE |
|---|
| 182 | for a 32 bit proc */ |
|---|
| 183 | #define K0BASE_EXL_WR 0xa800000000000000 /* exclusive on write */ |
|---|
| 184 | #define K0BASE_NONCOH 0x9800000000000000 /* noncoherent */ |
|---|
| 185 | #define K0BASE_EXL 0xa000000000000000 /* exclusive */ |
|---|
| 186 | |
|---|
| 187 | #ifndef CONFIG_CPU_R8000 |
|---|
| 188 | |
|---|
| 189 | /* |
|---|
| 190 | * The R8000 doesn't have the 32-bit compat spaces so we don't define them |
|---|
| 191 | * in order to catch bugs in the source code. |
|---|
| 192 | */ |
|---|
| 193 | |
|---|
| 194 | #define COMPAT_K1BASE32 0xffffffffa0000000 |
|---|
| 195 | #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ |
|---|
| 196 | |
|---|
| 197 | #endif |
|---|
| 198 | |
|---|
| 199 | #define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK) |
|---|
| 200 | #define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE) |
|---|
| 201 | |
|---|
| 202 | #endif /* _ASM_ADDRSPACE_H */ |
|---|
