| [2] | 1 | /* |
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| 2 | * This file is subject to the terms and conditions of the GNU General Public |
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| 3 | * License. See the file "COPYING" in the main directory of this archive |
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| 4 | * for more details. |
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| 5 | */ |
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| 6 | #ifndef _ASM_ELF_H |
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| 7 | #define _ASM_ELF_H |
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| 8 | |
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| 9 | |
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| 10 | /* ELF header e_flags defines. */ |
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| 11 | /* MIPS architecture level. */ |
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| 12 | #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ |
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| 13 | #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */ |
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| 14 | #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */ |
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| 15 | #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */ |
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| 16 | #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ |
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| 17 | #define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */ |
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| 18 | #define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */ |
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| 19 | |
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| 20 | /* The ABI of a file. */ |
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| 21 | #define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */ |
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| 22 | #define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */ |
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| 23 | |
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| 24 | #define PT_MIPS_REGINFO 0x70000000 |
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| 25 | #define PT_MIPS_RTPROC 0x70000001 |
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| 26 | #define PT_MIPS_OPTIONS 0x70000002 |
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| 27 | |
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| 28 | /* Flags in the e_flags field of the header */ |
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| 29 | #define EF_MIPS_NOREORDER 0x00000001 |
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| 30 | #define EF_MIPS_PIC 0x00000002 |
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| 31 | #define EF_MIPS_CPIC 0x00000004 |
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| 32 | #define EF_MIPS_ABI2 0x00000020 |
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| 33 | #define EF_MIPS_OPTIONS_FIRST 0x00000080 |
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| 34 | #define EF_MIPS_32BITMODE 0x00000100 |
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| 35 | #define EF_MIPS_ABI 0x0000f000 |
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| 36 | #define EF_MIPS_ARCH 0xf0000000 |
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| 37 | |
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| 38 | #define DT_MIPS_RLD_VERSION 0x70000001 |
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| 39 | #define DT_MIPS_TIME_STAMP 0x70000002 |
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| 40 | #define DT_MIPS_ICHECKSUM 0x70000003 |
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| 41 | #define DT_MIPS_IVERSION 0x70000004 |
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| 42 | #define DT_MIPS_FLAGS 0x70000005 |
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| 43 | #define RHF_NONE 0x00000000 |
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| 44 | #define RHF_HARDWAY 0x00000001 |
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| 45 | #define RHF_NOTPOT 0x00000002 |
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| 46 | #define RHF_SGI_ONLY 0x00000010 |
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| 47 | #define DT_MIPS_BASE_ADDRESS 0x70000006 |
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| 48 | #define DT_MIPS_CONFLICT 0x70000008 |
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| 49 | #define DT_MIPS_LIBLIST 0x70000009 |
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| 50 | #define DT_MIPS_LOCAL_GOTNO 0x7000000a |
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| 51 | #define DT_MIPS_CONFLICTNO 0x7000000b |
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| 52 | #define DT_MIPS_LIBLISTNO 0x70000010 |
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| 53 | #define DT_MIPS_SYMTABNO 0x70000011 |
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| 54 | #define DT_MIPS_UNREFEXTNO 0x70000012 |
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| 55 | #define DT_MIPS_GOTSYM 0x70000013 |
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| 56 | #define DT_MIPS_HIPAGENO 0x70000014 |
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| 57 | #define DT_MIPS_RLD_MAP 0x70000016 |
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| 58 | |
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| 59 | #define R_MIPS_NONE 0 |
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| 60 | #define R_MIPS_16 1 |
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| 61 | #define R_MIPS_32 2 |
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| 62 | #define R_MIPS_REL32 3 |
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| 63 | #define R_MIPS_26 4 |
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| 64 | #define R_MIPS_HI16 5 |
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| 65 | #define R_MIPS_LO16 6 |
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| 66 | #define R_MIPS_GPREL16 7 |
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| 67 | #define R_MIPS_LITERAL 8 |
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| 68 | #define R_MIPS_GOT16 9 |
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| 69 | #define R_MIPS_PC16 10 |
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| 70 | #define R_MIPS_CALL16 11 |
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| 71 | #define R_MIPS_GPREL32 12 |
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| 72 | /* The remaining relocs are defined on Irix, although they are not |
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| 73 | in the MIPS ELF ABI. */ |
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| 74 | #define R_MIPS_UNUSED1 13 |
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| 75 | #define R_MIPS_UNUSED2 14 |
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| 76 | #define R_MIPS_UNUSED3 15 |
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| 77 | #define R_MIPS_SHIFT5 16 |
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| 78 | #define R_MIPS_SHIFT6 17 |
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| 79 | #define R_MIPS_64 18 |
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| 80 | #define R_MIPS_GOT_DISP 19 |
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| 81 | #define R_MIPS_GOT_PAGE 20 |
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| 82 | #define R_MIPS_GOT_OFST 21 |
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| 83 | /* |
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| 84 | * The following two relocation types are specified in the MIPS ABI |
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| 85 | * conformance guide version 1.2 but not yet in the psABI. |
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| 86 | */ |
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| 87 | #define R_MIPS_GOTHI16 22 |
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| 88 | #define R_MIPS_GOTLO16 23 |
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| 89 | #define R_MIPS_SUB 24 |
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| 90 | #define R_MIPS_INSERT_A 25 |
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| 91 | #define R_MIPS_INSERT_B 26 |
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| 92 | #define R_MIPS_DELETE 27 |
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| 93 | #define R_MIPS_HIGHER 28 |
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| 94 | #define R_MIPS_HIGHEST 29 |
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| 95 | /* |
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| 96 | * The following two relocation types are specified in the MIPS ABI |
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| 97 | * conformance guide version 1.2 but not yet in the psABI. |
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| 98 | */ |
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| 99 | #define R_MIPS_CALLHI16 30 |
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| 100 | #define R_MIPS_CALLLO16 31 |
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| 101 | /* |
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| 102 | * This range is reserved for vendor specific relocations. |
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| 103 | */ |
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| 104 | #define R_MIPS_LOVENDOR 100 |
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| 105 | #define R_MIPS_HIVENDOR 127 |
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| 106 | |
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| 107 | #define SHN_MIPS_ACCOMON 0xff00 |
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| 108 | |
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| 109 | #define SHT_MIPS_LIST 0x70000000 |
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| 110 | #define SHT_MIPS_CONFLICT 0x70000002 |
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| 111 | #define SHT_MIPS_GPTAB 0x70000003 |
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| 112 | #define SHT_MIPS_UCODE 0x70000004 |
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| 113 | |
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| 114 | #define SHF_MIPS_GPREL 0x10000000 |
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| 115 | |
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| 116 | #ifndef ELF_ARCH |
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| 117 | /* ELF register definitions */ |
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| 118 | #define ELF_NGREG 45 |
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| 119 | #define ELF_NFPREG 33 |
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| 120 | |
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| 121 | typedef unsigned long elf_greg_t; |
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| 122 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; |
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| 123 | |
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| 124 | typedef double elf_fpreg_t; |
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| 125 | typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; |
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| 126 | |
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| 127 | #ifndef __mips64 |
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| 128 | |
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| 129 | /* |
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| 130 | * This is used to ensure we don't load something for the wrong architecture. |
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| 131 | */ |
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| 132 | #define elf_check_arch(hdr) \ |
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| 133 | ({ \ |
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| 134 | int __res = 1; \ |
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| 135 | struct elfhdr *__h = (hdr); \ |
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| 136 | \ |
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| 137 | if (__h->e_machine != EM_MIPS) \ |
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| 138 | __res = 0; \ |
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| 139 | if (__h->e_ident[EI_CLASS] != ELFCLASS32) \ |
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| 140 | __res = 0; \ |
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| 141 | if ((__h->e_flags & EF_MIPS_ABI2) != 0) \ |
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| 142 | __res = 0; \ |
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| 143 | if (((__h->e_flags & EF_MIPS_ABI) != 0) && \ |
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| 144 | ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \ |
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| 145 | __res = 0; \ |
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| 146 | \ |
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| 147 | __res; \ |
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| 148 | }) |
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| 149 | |
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| 150 | /* |
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| 151 | * These are used to set parameters in the core dumps. |
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| 152 | */ |
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| 153 | #define ELF_CLASS ELFCLASS32 |
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| 154 | |
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| 155 | #endif /* CONFIG_MIPS32 */ |
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| 156 | |
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| 157 | #ifdef __mips64 |
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| 158 | /* |
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| 159 | * This is used to ensure we don't load something for the wrong architecture. |
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| 160 | */ |
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| 161 | #define elf_check_arch(hdr) \ |
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| 162 | ({ \ |
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| 163 | int __res = 1; \ |
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| 164 | struct elfhdr *__h = (hdr); \ |
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| 165 | \ |
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| 166 | if (__h->e_machine != EM_MIPS) \ |
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| 167 | __res = 0; \ |
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| 168 | if (__h->e_ident[EI_CLASS] != ELFCLASS64) \ |
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| 169 | __res = 0; \ |
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| 170 | \ |
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| 171 | __res; \ |
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| 172 | }) |
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| 173 | |
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| 174 | /* |
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| 175 | * These are used to set parameters in the core dumps. |
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| 176 | */ |
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| 177 | #define ELF_CLASS ELFCLASS64 |
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| 178 | |
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| 179 | #endif /* CONFIG_MIPS64 */ |
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| 180 | |
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| 181 | /* |
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| 182 | * These are used to set parameters in the core dumps. |
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| 183 | */ |
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| 184 | #ifdef __MIPSEB__ |
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| 185 | #define ELF_DATA ELFDATA2MSB |
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| 186 | #elif __MIPSEL__ |
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| 187 | #define ELF_DATA ELFDATA2LSB |
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| 188 | #endif |
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| 189 | #define ELF_ARCH EM_MIPS |
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| 190 | |
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| 191 | #endif /* !defined(ELF_ARCH) */ |
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| 192 | |
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| 193 | |
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| 194 | /* This one accepts IRIX binaries. */ |
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| 195 | #define irix_elf_check_arch(hdr) ((hdr)->e_machine == EM_MIPS) |
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| 196 | |
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| 197 | #define USE_ELF_CORE_DUMP |
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| 198 | #define ELF_EXEC_PAGESIZE PAGE_SIZE |
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| 199 | |
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| 200 | #define ELF_CORE_COPY_REGS(_dest,_regs) \ |
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| 201 | memcpy((char *) &_dest, (char *) _regs, \ |
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| 202 | sizeof(struct pt_regs)); |
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| 203 | |
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| 204 | /* This yields a mask that user programs can use to figure out what |
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| 205 | instruction set this cpu supports. This could be done in userspace, |
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| 206 | but it's not easy, and we've already done it here. */ |
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| 207 | |
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| 208 | #define ELF_HWCAP (0) |
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| 209 | |
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| 210 | /* This yields a string that ld.so will use to load implementation |
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| 211 | specific libraries for optimization. This is more specific in |
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| 212 | intent than poking at uname or /proc/cpuinfo. |
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| 213 | |
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| 214 | For the moment, we have only optimizations for the Intel generations, |
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| 215 | but that could change... */ |
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| 216 | |
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| 217 | #define ELF_PLATFORM (NULL) |
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| 218 | |
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| 219 | extern void dump_regs(elf_greg_t *, struct pt_regs *regs); |
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| 220 | extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); |
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| 221 | |
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| 222 | #define ELF_CORE_COPY_REGS(elf_regs, regs) \ |
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| 223 | dump_regs((elf_greg_t *)&(elf_regs), regs); |
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| 224 | #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \ |
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| 225 | dump_task_fpu(tsk, elf_fpregs) |
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| 226 | |
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| 227 | /* |
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| 228 | * See comments in asm-alpha/elf.h, this is the same thing |
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| 229 | * on the MIPS. |
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| 230 | */ |
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| 231 | #define ELF_PLAT_INIT(_r, load_addr) do { \ |
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| 232 | _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \ |
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| 233 | _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \ |
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| 234 | _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \ |
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| 235 | _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \ |
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| 236 | _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \ |
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| 237 | _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \ |
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| 238 | _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \ |
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| 239 | _r->regs[30] = _r->regs[31] = 0; \ |
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| 240 | } while (0) |
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| 241 | |
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| 242 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical |
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| 243 | use of this is to invoke "./ld.so someprog" to test out a new version of |
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| 244 | the loader. We need to make sure that it is out of the way of the program |
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| 245 | that it will "exec", and that there is sufficient room for the brk. */ |
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| 246 | |
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| 247 | #ifndef ELF_ET_DYN_BASE |
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| 248 | #define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) |
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| 249 | #endif |
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| 250 | |
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| 251 | #endif /* _ASM_ELF_H */ |
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