| 1 | /* |
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| 2 | * Helpfile for jazzdma.c -- Mips Jazz R4030 DMA controller support |
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| 3 | */ |
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| 4 | #ifndef _ASM_JAZZDMA_H |
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| 5 | #define _ASM_JAZZDMA_H |
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| 6 | |
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| 7 | /* |
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| 8 | * Prototypes and macros |
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| 9 | */ |
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| 10 | extern void vdma_init(void); |
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| 11 | extern unsigned long vdma_alloc(unsigned long paddr, unsigned long size); |
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| 12 | extern int vdma_free(unsigned long laddr); |
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| 13 | extern int vdma_remap(unsigned long laddr, unsigned long paddr, |
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| 14 | unsigned long size); |
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| 15 | extern unsigned long vdma_phys2log(unsigned long paddr); |
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| 16 | extern unsigned long vdma_log2phys(unsigned long laddr); |
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| 17 | extern void vdma_stats(void); /* for debugging only */ |
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| 18 | |
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| 19 | extern void vdma_enable(int channel); |
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| 20 | extern void vdma_disable(int channel); |
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| 21 | extern void vdma_set_mode(int channel, int mode); |
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| 22 | extern void vdma_set_addr(int channel, long addr); |
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| 23 | extern void vdma_set_count(int channel, int count); |
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| 24 | extern int vdma_get_residue(int channel); |
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| 25 | extern int vdma_get_enable(int channel); |
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| 26 | |
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| 27 | /* |
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| 28 | * some definitions used by the driver functions |
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| 29 | */ |
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| 30 | #define VDMA_PAGESIZE 4096 |
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| 31 | #define VDMA_PGTBL_ENTRIES 4096 |
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| 32 | #define VDMA_PGTBL_SIZE (sizeof(VDMA_PGTBL_ENTRY) * VDMA_PGTBL_ENTRIES) |
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| 33 | #define VDMA_PAGE_EMPTY 0xff000000 |
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| 34 | |
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| 35 | /* |
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| 36 | * Macros to get page no. and offset of a given address |
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| 37 | * Note that VDMA_PAGE() works for physical addresses only |
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| 38 | */ |
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| 39 | #define VDMA_PAGE(a) ((unsigned int)(a) >> 12) |
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| 40 | #define VDMA_OFFSET(a) ((unsigned int)(a) & (VDMA_PAGESIZE-1)) |
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| 41 | |
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| 42 | /* |
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| 43 | * error code returned by vdma_alloc() |
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| 44 | * (See also arch/mips/kernel/jazzdma.c) |
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| 45 | */ |
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| 46 | #define VDMA_ERROR 0xffffffff |
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| 47 | |
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| 48 | /* |
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| 49 | * VDMA pagetable entry description |
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| 50 | */ |
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| 51 | typedef volatile struct VDMA_PGTBL_ENTRY { |
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| 52 | unsigned int frame; /* physical frame no. */ |
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| 53 | unsigned int owner; /* owner of this entry (0=free) */ |
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| 54 | } VDMA_PGTBL_ENTRY; |
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| 55 | |
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| 56 | |
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| 57 | /* |
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| 58 | * DMA channel control registers |
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| 59 | * in the R4030 MCT_ADR chip |
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| 60 | */ |
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| 61 | #define JAZZ_R4030_CHNL_MODE 0xE0000100 /* 8 DMA Channel Mode Registers, */ |
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| 62 | /* 0xE0000100,120,140... */ |
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| 63 | #define JAZZ_R4030_CHNL_ENABLE 0xE0000108 /* 8 DMA Channel Enable Regs, */ |
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| 64 | /* 0xE0000108,128,148... */ |
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| 65 | #define JAZZ_R4030_CHNL_COUNT 0xE0000110 /* 8 DMA Channel Byte Cnt Regs, */ |
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| 66 | /* 0xE0000110,130,150... */ |
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| 67 | #define JAZZ_R4030_CHNL_ADDR 0xE0000118 /* 8 DMA Channel Address Regs, */ |
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| 68 | /* 0xE0000118,138,158... */ |
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| 69 | |
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| 70 | /* channel enable register bits */ |
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| 71 | |
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| 72 | #define R4030_CHNL_ENABLE (1<<0) |
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| 73 | #define R4030_CHNL_WRITE (1<<1) |
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| 74 | #define R4030_TC_INTR (1<<8) |
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| 75 | #define R4030_MEM_INTR (1<<9) |
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| 76 | #define R4030_ADDR_INTR (1<<10) |
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| 77 | |
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| 78 | /* |
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| 79 | * Channel mode register bits |
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| 80 | */ |
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| 81 | #define R4030_MODE_ATIME_40 (0) /* device access time on remote bus */ |
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| 82 | #define R4030_MODE_ATIME_80 (1) |
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| 83 | #define R4030_MODE_ATIME_120 (2) |
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| 84 | #define R4030_MODE_ATIME_160 (3) |
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| 85 | #define R4030_MODE_ATIME_200 (4) |
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| 86 | #define R4030_MODE_ATIME_240 (5) |
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| 87 | #define R4030_MODE_ATIME_280 (6) |
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| 88 | #define R4030_MODE_ATIME_320 (7) |
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| 89 | #define R4030_MODE_WIDTH_8 (1<<3) /* device data bus width */ |
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| 90 | #define R4030_MODE_WIDTH_16 (2<<3) |
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| 91 | #define R4030_MODE_WIDTH_32 (3<<3) |
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| 92 | #define R4030_MODE_INTR_EN (1<<5) |
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| 93 | #define R4030_MODE_BURST (1<<6) /* Rev. 2 only */ |
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| 94 | #define R4030_MODE_FAST_ACK (1<<7) /* Rev. 2 only */ |
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| 95 | |
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| 96 | #endif /* _ASM_JAZZDMA_H */ |
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