| 1 | /* |
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| 2 | * Private header file for the (dumb) serial driver |
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| 3 | * |
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| 4 | * Copyright (C) 1997 by Theodore Ts'o. |
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| 5 | * |
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| 6 | * Redistribution of this file is permitted under the terms of the GNU |
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| 7 | * Public License (GPL) |
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| 8 | */ |
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| 9 | |
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| 10 | #ifndef _LINUX_SERIALP_H |
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| 11 | #define _LINUX_SERIALP_H |
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| 12 | |
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| 13 | /* |
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| 14 | * This is our internal structure for each serial port's state. |
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| 15 | * |
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| 16 | * Many fields are paralleled by the structure used by the serial_struct |
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| 17 | * structure. |
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| 18 | * |
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| 19 | * For definitions of the flags field, see tty.h |
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| 20 | */ |
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| 21 | |
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| 22 | #include <linux/version.h> |
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| 23 | #include <linux/termios.h> |
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| 24 | #include <linux/workqueue.h> |
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| 25 | #include <linux/interrupt.h> |
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| 26 | #include <linux/circ_buf.h> |
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| 27 | #include <linux/wait.h> |
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| 28 | |
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| 29 | struct serial_state { |
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| 30 | int magic; |
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| 31 | int baud_base; |
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| 32 | unsigned long port; |
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| 33 | int irq; |
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| 34 | int flags; |
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| 35 | int hub6; |
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| 36 | int type; |
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| 37 | int line; |
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| 38 | int revision; /* Chip revision (950) */ |
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| 39 | int xmit_fifo_size; |
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| 40 | int custom_divisor; |
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| 41 | int count; |
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| 42 | __u8 *iomem_base; |
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| 43 | __u16 iomem_reg_shift; |
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| 44 | unsigned short close_delay; |
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| 45 | unsigned short closing_wait; /* time to wait before closing */ |
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| 46 | struct async_icount icount; |
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| 47 | int io_type; |
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| 48 | struct async_struct *info; |
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| 49 | struct pci_dev *dev; |
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| 50 | }; |
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| 51 | |
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| 52 | struct async_struct { |
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| 53 | int magic; |
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| 54 | unsigned long port; |
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| 55 | int hub6; |
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| 56 | int flags; |
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| 57 | int xmit_fifo_size; |
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| 58 | struct serial_state *state; |
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| 59 | struct tty_struct *tty; |
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| 60 | int read_status_mask; |
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| 61 | int ignore_status_mask; |
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| 62 | int timeout; |
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| 63 | int quot; |
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| 64 | int x_char; /* xon/xoff character */ |
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| 65 | int close_delay; |
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| 66 | unsigned short closing_wait; |
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| 67 | unsigned short closing_wait2; /* obsolete */ |
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| 68 | int IER; /* Interrupt Enable Register */ |
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| 69 | int MCR; /* Modem control register */ |
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| 70 | int LCR; /* Line control register */ |
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| 71 | int ACR; /* 16950 Additional Control Reg. */ |
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| 72 | unsigned long event; |
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| 73 | unsigned long last_active; |
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| 74 | int line; |
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| 75 | int blocked_open; /* # of blocked opens */ |
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| 76 | struct circ_buf xmit; |
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| 77 | spinlock_t xmit_lock; |
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| 78 | __u8 *iomem_base; |
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| 79 | __u16 iomem_reg_shift; |
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| 80 | int io_type; |
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| 81 | struct work_struct work; |
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| 82 | struct tasklet_struct tlet; |
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| 83 | #ifdef DECLARE_WAITQUEUE |
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| 84 | wait_queue_head_t open_wait; |
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| 85 | wait_queue_head_t close_wait; |
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| 86 | wait_queue_head_t delta_msr_wait; |
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| 87 | #else |
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| 88 | struct wait_queue *open_wait; |
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| 89 | struct wait_queue *close_wait; |
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| 90 | struct wait_queue *delta_msr_wait; |
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| 91 | #endif |
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| 92 | struct async_struct *next_port; /* For the linked list */ |
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| 93 | struct async_struct *prev_port; |
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| 94 | }; |
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| 95 | |
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| 96 | #define CONFIGURED_SERIAL_PORT(info) ((info)->port || ((info)->iomem_base)) |
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| 97 | |
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| 98 | #define SERIAL_MAGIC 0x5301 |
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| 99 | #define SSTATE_MAGIC 0x5302 |
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| 100 | |
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| 101 | /* |
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| 102 | * Events are used to schedule things to happen at timer-interrupt |
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| 103 | * time, instead of at rs interrupt time. |
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| 104 | */ |
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| 105 | #define RS_EVENT_WRITE_WAKEUP 0 |
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| 106 | |
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| 107 | /* |
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| 108 | * Multiport serial configuration structure --- internal structure |
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| 109 | */ |
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| 110 | struct rs_multiport_struct { |
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| 111 | int port1; |
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| 112 | unsigned char mask1, match1; |
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| 113 | int port2; |
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| 114 | unsigned char mask2, match2; |
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| 115 | int port3; |
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| 116 | unsigned char mask3, match3; |
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| 117 | int port4; |
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| 118 | unsigned char mask4, match4; |
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| 119 | int port_monitor; |
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| 120 | }; |
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| 121 | |
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| 122 | #if defined(__alpha__) && !defined(CONFIG_PCI) |
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| 123 | /* |
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| 124 | * Digital did something really horribly wrong with the OUT1 and OUT2 |
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| 125 | * lines on at least some ALPHA's. The failure mode is that if either |
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| 126 | * is cleared, the machine locks up with endless interrupts. |
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| 127 | * |
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| 128 | * This is still used by arch/mips/au1000/common/serial.c for some weird |
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| 129 | * reason (mips != alpha!) |
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| 130 | */ |
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| 131 | #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1) |
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| 132 | #elif defined(CONFIG_SBC8560) |
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| 133 | /* |
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| 134 | * WindRiver did something similarly broken on their SBC8560 board. The |
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| 135 | * UART tristates its IRQ output while OUT2 is clear, but they pulled |
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| 136 | * the interrupt line _up_ instead of down, so if we register the IRQ |
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| 137 | * while the UART is in that state, we die in an IRQ storm. */ |
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| 138 | #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2) |
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| 139 | #else |
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| 140 | #define ALPHA_KLUDGE_MCR 0 |
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| 141 | #endif |
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| 142 | |
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| 143 | /* |
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| 144 | * Definitions for PCI support. |
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| 145 | */ |
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| 146 | #define SPCI_FL_BASE_MASK 0x0007 |
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| 147 | #define SPCI_FL_BASE0 0x0000 |
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| 148 | #define SPCI_FL_BASE1 0x0001 |
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| 149 | #define SPCI_FL_BASE2 0x0002 |
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| 150 | #define SPCI_FL_BASE3 0x0003 |
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| 151 | #define SPCI_FL_BASE4 0x0004 |
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| 152 | #define SPCI_FL_GET_BASE(x) (x & SPCI_FL_BASE_MASK) |
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| 153 | |
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| 154 | #define SPCI_FL_IRQ_MASK (0x0007 << 4) |
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| 155 | #define SPCI_FL_IRQBASE0 (0x0000 << 4) |
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| 156 | #define SPCI_FL_IRQBASE1 (0x0001 << 4) |
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| 157 | #define SPCI_FL_IRQBASE2 (0x0002 << 4) |
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| 158 | #define SPCI_FL_IRQBASE3 (0x0003 << 4) |
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| 159 | #define SPCI_FL_IRQBASE4 (0x0004 << 4) |
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| 160 | #define SPCI_FL_GET_IRQBASE(x) ((x & SPCI_FL_IRQ_MASK) >> 4) |
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| 161 | |
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| 162 | /* Use successive BARs (PCI base address registers), |
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| 163 | else use offset into some specified BAR */ |
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| 164 | #define SPCI_FL_BASE_TABLE 0x0100 |
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| 165 | |
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| 166 | /* Use successive entries in the irq resource table */ |
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| 167 | #define SPCI_FL_IRQ_TABLE 0x0200 |
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| 168 | |
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| 169 | /* Use the irq resource table instead of dev->irq */ |
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| 170 | #define SPCI_FL_IRQRESOURCE 0x0400 |
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| 171 | |
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| 172 | /* Use the Base address register size to cap number of ports */ |
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| 173 | #define SPCI_FL_REGION_SZ_CAP 0x0800 |
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| 174 | |
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| 175 | /* Do not use irq sharing for this device */ |
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| 176 | #define SPCI_FL_NO_SHIRQ 0x1000 |
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| 177 | |
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| 178 | /* This is a PNP device */ |
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| 179 | #define SPCI_FL_ISPNP 0x2000 |
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| 180 | |
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| 181 | #define SPCI_FL_PNPDEFAULT (SPCI_FL_IRQRESOURCE|SPCI_FL_ISPNP) |
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| 182 | |
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| 183 | #endif /* _LINUX_SERIAL_H */ |
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