/*************************************************************************
** 	Broadcom Corp. Confidential
** 	Copyright 2010 Broadcom Corp.  All Rights Reserved.
**
**  THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
**  AGREEMENT  BETWEEN THE USER AND BROADCOM.  YOU HAVE NO RIGHT TO USE OR
**  EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
**
**	File:         	bl.S
**	Description:	low level board dependent startup code
**	Created:      	alex[
**
**	REVISION:
**
***************************************************************************/

#include "bmips3300.h"
#include "bchp_common.h"
#include "bchp_sun_top_ctrl.h"
#include "bchp_memc_ddr23_aphy_ac_0.h"
#include "memc_0_config.h"

#define SHMOO_STACK_START 0x80000000
#define SHMOO_STACK_SIZE 0x4000

#define BCHP_REG_BASE PHYS_TO_K1(BCHP_PHYSICAL_OFFSET)
#define INITIAL_SR      ((CP0_STATUS_SR_MASK | CP0_STATUS_CU1_MASK | CP0_STATUS_BEV_MASK | CP0_STATUS_IE_MASK) & ~( CP0_STATUS_ERL_MASK | CP0_STATUS_EXL_MASK))
		BL_STACK_SIZE = 0x1000

		.lcomm bl_stack, BL_STACK_SIZE
		.text
		.globl __start
		.set    noreorder

__start:
		b init_cpu
		nop
		.org __start+0x380
rom_gen_ex:		# general exception will loop here
		b rom_gen_ex
		nop
		nop
		nop
        .globl key1
key1:
/*      .fill 0x80, 1, 0xaa */
/* test public key generated from privkey.pem */
        .word 0x9A231766,0x5903DAB5,0x9BA09842,0x8C8E0A10
        .word 0xA81264B2,0xF011A39C,0xE515793F,0x99900060
        .word 0xDAA137F4,0xBA0C6075,0xE78D15D9,0x2A48DDD3
        .word 0x71F3AE65,0x7CF04AFC,0x6AD79335,0x8EC267B5
        .word 0xE5F95530,0x7CB71669,0xBA23B801,0x643A8299
        .word 0xF2882267,0x8C5ECE15,0x8A9C7AD1,0x231F8D2B
        .word 0x19CF89F2,0xAE2905A2,0xD764A002,0x557C855E
        .word 0xC5640D61,0x4C27B99C,0x5B74E4B4,0xFEF0D90B
key1_header:
        .fill 0x40, 1, 0xbb
key1_signature:
        .fill 0x80, 1, 0xcc
external_root_key:
        .fill 0x80, 1, 0xdd
bootloader_signature:
        .fill 0x80, 1, 0xee
bootloader_header:
        .fill 0x40, 1, 0x55

init_cpu:
		li t0, INITIAL_SR 
		mtc0 t0, CP0_STATUS
		nop
		nop
		
		move $28, $0
/* cache off: clear top 2 bits of CP0, $22 select $2 */
		mfc0 $2, $22, 0 
		and $2, $2, ~0xc0000000 
		mtc0 $2, $22, 0 
		nop
/* Bring everything out of reset except external system reset */
		li t0, BCHP_REG_BASE | BCHP_SUN_TOP_CTRL_SW_RESET
		li t3, (BCHP_SUN_TOP_CTRL_SW_RESET_aio_sw_reset_MASK |\
				BCHP_SUN_TOP_CTRL_SW_RESET_bvn_sw_reset_MASK |\
				BCHP_SUN_TOP_CTRL_SW_RESET_vec_sw_reset_MASK |\
				BCHP_SUN_TOP_CTRL_SW_RESET_xpt_sw_reset_MASK |\
				BCHP_SUN_TOP_CTRL_SW_RESET_sundry_sw_reset_MASK |\
				BCHP_SUN_TOP_CTRL_SW_RESET_memc_sw_reset_MASK)
		sw t3,0(t0)
		sync
		li t3,0
		sw t3,0(t0)

#if 1 /* Surendra and Andrew indicate this is needed in the bootloader */
		/* DRAM for HD DTA */
		li t0, BCHP_REG_BASE | BCHP_MEMC_DDR23_APHY_AC_0_PLL_FREQ_CNTL
		lw t2, 0(t0)
		and t3, t2, ~BCHP_MEMC_DDR23_APHY_AC_0_PLL_FREQ_CNTL_MDIV_MASK
		or t3, (5 << BCHP_MEMC_DDR23_APHY_AC_0_PLL_FREQ_CNTL_MDIV_SHIFT)
		sw t3, 0(t0)
		sync
#endif
		bal init_serial
		nop
		
		bal _writeasm
		li a0, '$'

		bal init_mips
		nop

		bal do_chip_init
        nop
		
		bal init_serial
		nop
		
		li		a0, SHMOO_STACK_START
		li		a1, SHMOO_STACK_SIZE
		bal		lock_d_cache
		nop	

		/* now initialize sp to stack start */
		la		sp, (SHMOO_STACK_START + SHMOO_STACK_SIZE - 48)		
		# create a stack space for the the memc_init arguments.
		addiu	sp, -16
		# load parameters in a0-a3 for memc_init
		
		/*int memc_init(int32_t memc_num_to_shmoo, int32_t write_dqs_shmoo_range, uint32_t num_byte_slices, uint32_t gate_value)
*/
		li		a0, 0x0
		lui		a1, MEMC_0_DEFAULT_WRITE_DQS_PHASE_RANGE_UPPER
		ori		a1, MEMC_0_DEFAULT_WRITE_DQS_PHASE_RANGE_LOWER
		li		a2, 2 #16bit DDR
		li		a3, MEMC_0_DEFAULT_GATE_VALUE
		
		la		t0, memc_init
		jalr	t0
		nop

		bal		_writeasm
		li		a0, 'H'

		bal invalidate_all_i_cache
		nop
		
		bal		_writeasm
		li		a0, 'E'

		bal clear_all_d_cache
		nop
		bal		_writeasm
		li		a0, 'L'

/* copy data segment */
		la a0, _etext
		la a1, _fdata
		la t2,_edata
		subu a2,t2,a1
	
		beqz a2, 2f
		nop
1:
		lw t0, 0(a0)
		sw	t0, 0(a1)
		sub	a2, a2, 4
		addi a0, a0, 4
		addi a1, a1, 4
		bnez a2, 1b
		nop
2:
		bal		_writeasm
		li		a0, 'L'
	
/* clear bss segment */
		la	a0,_fbss
		la	a1,_end
		subu	a1,a1,a0    

		beqz a1, 2f
		nop
1:
		sw zero,0(a0)
		sub	a1, a1, 4
		addi a0, a0, 4
		bnez a1, 1b
		nop
2:	
		bal		_writeasm
		li		a0, 'O'
		
/* load stack pointer*/
		la sp, bl_stack + BL_STACK_SIZE - 24
/* jump in to cached segment */
		la t0, bootloader_main
		jalr t0
		move a0, zero
loop:
		b loop
		nop

LEAF(aligned_copy)

1:
        lw      v0, 0(a0)
        addiu   a2, a2, -4
        sw      v0, 0(a1)
        addiu   a0, a0, 4
        bnez    a2, 1b
        addiu   a1, a1, 4

        jr      ra
        nop

END(aligned_copy)

#include "uart.s"
#include "chip.s"
#undef RelAddrPrintChar
#undef RelAddrPrintHex32
#undef SHMOO_STACK_START
#undef SHMOO_STACK_SIZE
#include "common_routines.s"
#include "cache_lib.s"
#include "mips_libs.s"
#include "memc_0_client_prog.s"
#include "memc_0_access.s"
#include "run_shmoo.s"