/*************************************************************************
**  Broadcom Corp. Confidential
**  Copyright 2010 Broadcom Corp.  All Rights Reserved.
**
**  THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
**  AGREEMENT  BETWEEN THE USER AND BROADCOM.  YOU HAVE NO RIGHT TO USE OR
**  EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
**
**  File:           bls2.S
**  Description:    low level board dependent startup code stage 2
**  Created:        alexp
**
**  REVISION:
**
***************************************************************************/

#include "bmips3300.h"
#include "bchp_common.h"
#include "bchp_sun_top_ctrl.h"

#define BCHP_REG_BASE PHYS_TO_K1(BCHP_PHYSICAL_OFFSET)
#define INITIAL_SR      ((CP0_STATUS_SR_MASK | CP0_STATUS_CU1_MASK | CP0_STATUS_BEV_MASK | CP0_STATUS_IE_MASK) & ~( CP0_STATUS_ERL_MASK | CP0_STATUS_EXL_MASK))
        BL_STACK_SIZE = 0x1000

        .lcomm bl_stack, BL_STACK_SIZE
        .text
        .globl __start_s2
        .set    noreorder

__start_s2:
        b init_cpu
        nop
init_cpu:
        li t0, INITIAL_SR 
        mtc0 t0, CP0_STATUS
        nop
        nop
        bal _writeasm
        li a0, '1'
        bal init_mips
        nop
        bal _writeasm
        li a0, '2'
/* copy exception vector to correct location */
        la t0, general_exception
        li a0, 0xa0000180
        lw a1, (t0)
        sw a1, (a0)
        lw a1, 4(t0)
        sw a1, 4(a0)
        lw a1, 8(t0)
        sw a1, 8(a0)
        lw a1, 12(t0)
        sw a1, 12(a0)
        
        bal _writeasm
        li a0, '3'
        
        la t0, start_cached
/* start execution from cached memory */
        jr t0
        nop
start_cached:
        bal     _writeasm
        li      a0, '4'

/* copy data segment */
        la a0, _etext
        la a1, _fdata
        la t2,_edata
        subu a2,t2,a1
    
        beqz a2, 2f
        nop
1:
        lw t0, 0(a0)
        sw  t0, 0(a1)
        sub a2, a2, 4
        addi a0, a0, 4
        addi a1, a1, 4
        bnez a2, 1b
        nop
2:
        bal     _writeasm
        li      a0, '5'
    
/* clear bss segment */
        la  a0,_fbss
        la  a1,_end
        subu    a1,a1,a0    

        beqz a1, 2f
        nop
1:
        sw zero,0(a0)
        sub a1, a1, 4
        addi a0, a0, 4
        bnez a1, 1b
        nop
2:  
        bal     _writeasm
        li      a0, '6'
        
/* load stack pointer*/
        la sp, bl_stack + BL_STACK_SIZE - 24
/* jump in to cached segment */
        la t0, bootloader_main
        jalr t0
        move a0, zero
loop:
        b loop
        nop

LEAF(aligned_copy)

1:  
        lw      v0, 0(a0)
        addiu   a2, a2, -4
        sw      v0, 0(a1)
        addiu   a0, a0, 4
        bnez    a2, 1b
        addiu   a1, a1, 4
    
        jr      ra
        nop

END(aligned_copy) 

/* general exception will loop here */
LEAF(general_exception)
        b general_exception
        nop
        nop
        nop
END(general_exception)

#include "uart.s"
#include "chip.s"
#undef RelAddrPrintChar
#undef RelAddrPrintHex32
#include "common_routines.s"
#include "memc_0_client_prog.s"
#include "cache_lib.s"
#include "mips_libs.s"
#include "memc_0_access.s"